TLine1
Lossless transmission line with characteristic impedance Z0 and transmission delay TD
Library
Electrical/Analog/Lines
Description
Lossless transmission line with characteristic impedance Z0 and transmission delay TD The lossless transmission line TLine1 is a two Port. Both port branches consist of a resistor with characteristic impedance Z0 and a controlled voltage source that takes into consideration the transmission delay TD. For further details see Branin's article below. The model parameters can be derived from inductance and capacitance per length (L' resp. C'), i. e. Z0 = sqrt(L'/C') and TD = sqrt(L'*C')*length_of_line. Resistance R' and conductance C' per meter are assumed to be zero.
References:
- Branin Jr., F. H.
- Transient Analysis of Lossless Transmission Lines. Proceedings of the IEEE 55(1967), 2012 - 2013
- Hoefer, E. E. E.; Nielinger, H.
- SPICE : Analyseprogramm fuer elektronische Schaltungen. Springer-Verlag, Berlin, Heidelberg, New York, Tokyo, 1985.
Parameters
Name | Label | Description | Data Type | Valid Values |
---|---|---|---|---|
mo_Z0 | Z0 | Characteristic impedance | Scalar | |
mo_TD | TD | Transmission delay | Scalar |
Name | Label | Description | Data Type | Valid Values |
---|---|---|---|---|
mo_v1 | v1 | v1 | Structure | |
mo_v1/fixed | fixed | Cell of scalars | true | |
mo_v1/start | start | Cell of scalars | ||
mo_v2 | v2 | v2 | Structure | |
mo_v2/fixed | fixed | Cell of scalars | true | |
mo_v2/start | start | Cell of scalars | ||
mo_i1 | i1 | i1 | Structure | |
mo_i1/fixed | fixed | Cell of scalars | true | |
mo_i1/start | start | Cell of scalars | ||
mo_i2 | i2 | i2 | Structure | |
mo_i2/fixed | fixed | Cell of scalars | true | |
mo_i2/start | start | Cell of scalars |
Ports
Name | Type | Description | IO Type | Number |
---|---|---|---|---|
p1 | implicit | Positive electrical pin of port 1 | input | 1 |
n1 | implicit | Negative electrical pin of port 1 | output | 1 |
p2 | implicit | Positive electrical pin of port 2 | input | 2 |
n2 | implicit | Negative electrical pin of port 2 | output | 2 |