Minimum Via Land Size
Check size of Via's land.
- Checking: Check the size of Via’s land.
- Minimum Via’s Land Size: Set the minimum size of Via’s pad.
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Discover PollEx functionality with interactive tutorials.
Discover PollEx functionality with comprehensive user guides.
This section contains the user guides for the following tools: Block JIG Generator, Compare GDSII, Gerber to PCB, Make Board Paneling, Metal Mask Manager, Mounting Data Extractor, Mounting Emulator, Router-Machine JIG Generator, Solder Quantity Calculator, Soldering Pallet, Test Point Location Generator, and Underfill.
This section contains the user guides for the following tools: BOM, CAM, Component Arrangement Plan, CP, Golden Sample, Logic, PCB, Redmark+, and Worksheet Planner.
This section contains the user guides for the following tools: PI, SI, SI Explorer, and Thermal.
This section contains the user guides for the following tools: DFA, DFE, DFE+, DFM, and Logic DFE.
PollEx DFA is an assembly status checking toolset for PCB design based on 3D package library.
PollEx DFE+ is a fully automated SI analysis tool.
PollEx DFM is a board level manufacturability checking software.
From the menu bar, click Option > DFM > DFM Input after reading the design file to make a DFM input file.
FPCB is excellent for development of electronic components as electronic appliances are becoming miniaturized and lightweight.
Check the clearance for an area affected by ground wall.
Check specified components pattern connected pin area ratio.
Check existence of dummy pads.
Check different type of dummy pad existence in design.
Check holes placed on component pads.
Check the metal mask design rules.
Check size of Via's land.
Check target component’s pattern connecting status.
Check Vias are covered with PSR or solder mask.
Check if silkscreen data are overlapped with pads.
Solder Resistor (SR) is a material which is applied to specific areas of the printed circuit board during a soldering process and protects the circuit of the unnecessary portions of solder.
Check rule related to teardrop in design.
Check rule for component thermal pads.
Check the annular ring, the distance between pad and HOLE size.
Check the number of layers for drilling operation.
Depending on the via type, check different clearance to different PCB objects.
Check via clearance depending on via size.
Check the distance between solder mask in via to other pads.
Check wave mark in the FPC component edge.
Verify if the clearance between test points and other objects follow specifications and if the test points contain text.
Analyze the clearance between a test point and each component on a board.
Find and examine underfill areas in BGA-type components.
Lock the DFM input rule file (*.DFMI) to prevent any modifications from others.
PollEx Logic DFE is a toolset that checks electrical validity and standardizing of schematic design.
This section contains the PollEx UPE user guide.
Definition for meta character using in making sentence for searching option.
Discover PollEx functionality with comprehensive user guides.
This section contains the user guides for the following tools: DFA, DFE, DFE+, DFM, and Logic DFE.
PollEx DFM is a board level manufacturability checking software.
Check size of Via's land.
Check size of Via's land.
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