2022.1
PollEx DFM is a board level manufacturability checking software.
View new features for PollEx 2022.1.
Learn the basics and discover the workspace.
Discover PollEx functionality with interactive tutorials.
PollEx DFA is an assembly status checking toolset for PCB design based on 3D package library.
PollEx DFE+ is a fully automated SI analysis tool.
From the menu bar, click Option > DFM > DFM Input after reading the design file to make a DFM input file.
Check an item for the panel board size, whether or not the size is standard. Follow the instructions to set checking parameters.
Analyze clearances between the contour of the array board and the sub-boards.
Check the design board’s origin points.
Check the cutting hole’s design rule, location, and clearance to other objects.
Verify the certain layer’s existence and data existence on the layer.
Verify the copper existence in the dummy area of an arrayed board.
Verify that fiducial marks are designed correctly on the paneling board.
Validate the guiding hole in the PCB's design.
Check item for the soldering guide line’s width and the drawing layers clearance with other geometries or objects.
Detect the JIG hole that drives in Jig machine.
Check the label box’s existence or size.
If silkscreen data is drawn with a thin width, it’s difficult to recognize it.
Often, Missing Hole is also referred to as Cutting Region.
Recognize a single board by machinery and check the rules about PCB marks.
Analyze the sharpness of the PCB outline.
Verify the clearance between a single board’s outline and various objects.
Check the width of the PCB outline.
Check the rule for the routing slit on the PCB design.
Verify that the solder mask is on the PCB design and if it overlaps with routing patterns.
SMT direction marks placement checking item on special layer.
Check if single boards keep the same distance to panel or keep placing type.
Check the sub-board’s placement order and soldering direction.
Check the v-cut and its region in the panel board.
Check the clearance for an area affected by ground wall.
Verify if the clearance between test points and other objects follow specifications and if the test points contain text.
Analyze the clearance between a test point and each component on a board.
Find and examine underfill areas in BGA-type components.
Lock the DFM input rule file (*.DFMI) to prevent any modifications from others.
PollEx Logic DFE is a toolset that checks electrical validity and standardizing of schematic design.
Definition for meta character using in making sentence for searching option.